The Configuration Engine section of the Spartan UltraScale+ FPGAs Configuration User Guide (UG860) describes the Spartan UltraScale+ XCSU35P device boot process. The SCU35 board supports a subset of the modes documented in the configuration user guide via onboard boot options. The header J35 configuration option settings are listed in the following table.
| Boot Mode | Mode Pins [0:2] |
|---|---|
| JTAG (default) |
0x5 [101] – J35
open |
| QSPI SPI_24 |
0x4 [100] – J35
jumpered |