The board provides four Digilent Pmod interfaces. These interfaces are connected to XCSU35P HDIO bank 66. Each Pmod interface provides 8 digital I/O, 2 power pins, and 2 ground pins. The PMOD connectors are placed to support the use of dual-wide Pmod boards.
All XCSU35P I/Os connected to the Pmod interfaces support single-ended line rate of 250 Mb/s.
The Pmod power pins are supplied by 3.3 V. A load switch is provided for overcurrent and reverse current protection and is enabled by the PMOD_3V3_ON FPGA I/O signal on bank 68. A maximum current of 1.0 A may be drawn from 3.3 V rail.
For more information about the Digilent Pmod interface, see https://digilent.com/reference/pmod/start.
Important: The XCSU35P FPGA I/Os are not 5V
tolerant. Pmods that use 5V I/O cannot be used with the SCU35 board. The maximum
voltage that can be applied to the XCSU35P FPGA HD I/Os is Vcco + 0.550V.
Additionally, the FPGA bank I/O voltage must match the requirements for the I/O
standards that have been assigned to the I/O bank.