MikroBUS (Click) - UG1713

SCU35 Evaluation Board User Guide (UG1713)
Document ID
UG1713
Release Date
2025-11-21
Revision
v1.0 English

The board provides 2 MikroE mikroBus™ expansion interfaces for use with MikroE Click boards™. These interfaces are connected to XCSU35P HDIO banks 65 & 66. Each mikroBUS interface provides 11 Digital I/O, 1 Analog input, 2 power pins, and 2 ground pins. The analog input (AN) pin is connected to the SYSMON XADC pins on bank 66.

All XCSU35P I/Os connected to the mikroBUS interfaces support single-ended line rate of 250 Mb/s.

The mikroBUS power pins are supplied by 3.3V. Load switches are provided for overcurrent and reverse current protection and are enabled by the MCLICK1_3V3_ON and MCLICK2_3V3_ON FPGA I/O signals on bank 67. A maximum current of 1.0A may be drawn from 3.3V rail.

For more information about the MikroE mikroBUS, see https://www.mikroe.com/mikrobus.

Important: The XCSU35P FPGA I/Os are not 5V tolerant. MikroE Click boards™ that use 5V I/O cannot be used with the SCU35 board. The maximum voltage that can be applied to the XCSU35P FPGA HD I/Os is Vcco + 0.550V. Additionally, the FPGA bank I/O voltage must match the requirements for the I/O standards that have been assigned to the I/O bank.