I2C Buses and Connections - UG1713

SCU35 Evaluation Board User Guide (UG1713)

Document ID
UG1713
Release Date
2025-11-21
Revision
v1.0 English

There are several I2C interfaces on the XCSU35P FPGA that connect to devices on the SCU35 board:

Table 1. I2C Interfaces
I2C Interface Purpose Ref Des I2C Address
SySMon System Monitor J4 0x## 1
I2C0 EEPROM U17 0x50 & 0x58
I2C1 Power telemetry U61 0x44
I2C1 Power telemetry U64 0x45
I2C2 USB-C PD U34 0x20
I2C3 Accelerometer U18 0x18
I2C4 HSIO J21 0x32
  1. Configurable.

The following figure shows the I2C bus connectivity detailed in the table above. Discrete I2C interfaces on the FPGA eliminate the need for I2C multiplexers on the board and provide great flexibility to include only those interfaces in the FPGA design that are required for the user application.

Figure 1. I2C Bus Connectivity

The detailed FPGA connections for the feature described in this section are documented in the SCU35 evaluation board schematic and XDC file.