Board Features - UG1713

SCU35 Evaluation Board User Guide (UG1713)

Document ID
UG1713
Release Date
2025-11-21
Revision
v1.0 English

The SCU35 evaluation board features are listed here. Detailed information for each feature is provided in Board Component Descriptions.

  • XCSU35P
  • SBVB625 package
  • Form factor: see Board Specifications.
  • Onboard configuration from:
    • USB-to-JTAG bridge
    • JTAG pod 2 mm 2x7 flat cable connector
    • Quad SPI (QSPI) SPI_24 mode
  • Clocks
    • FPGA bank 47 System clock LVDS 100 MHz
    • FPGA bank 47 HyperRAM 200MHz
    • FPGA bank 47 HSIO_CLK_IN design dependent
    • FPGA bank 47 HSIO_CLK_OUT design dependent
  • HyperRAM (8 MB)
  • I/O Expansion
    • Arduino Shield
      • Analog, GPIO, I2C, SPI
    • HSIO
      • I2C, high speed differential and single-ended I/O
    • MikroBUS (Click) (2)
      • I2C, PWM, SPI, UART
    • Pmods
      • GPIO
    • Raspberry Pi HAT (2)
      • GPIO, I2C, SPI, UART
  • User GPIO
    • DIP switch (8-position)
    • Pushbutton switches (5)
    • RGB LEDs (5)
  • UARTs (3)
  • Three axis linear accelerometer (I2C)
  • EEPROM (I2C)
  • Power telemetry (I2C)
  • USB-C power status and control (I2C)
  • SYSMON header
  • MII 10/100 Ethernet
  • Cooling fan 5V (optional)
  • Operational switches and jumper (PROGRAM_B, PUDC_B, boot mode)
  • Operational status LEDs (INIT_B, DONE, SYS_PG, PLUG_EVENT, CAP_MIS)
  • Debug headers
    • HPIO (2 I/O)
    • HDIO (10 I/O)

The SCU35 evaluation board provides a rapid prototyping platform using the XCSU35P-2SBVB625E device. See the UltraScale Architecture and Product Data Sheet: Overview (DS890) for a feature set overview, description, and ordering information.