- Enable Embedded Instruction Set: Enable RV32E Base Integer Instruction Set. When this parameter is set, the core uses RV32E instead of RV32I, which reduces the integer register count to 16. The option is only available when the 32-bit processor is selected.
- Select Barrel Shifter Implementation: When this parameter is set to PERFORMANCE, the barrel shifter computes the result in one cycle. It can be set to AREA, to save resources, but then it takes longer to compute the result, depending on the shift amount.
- Enable Base Counters and Timers: Enable RISC-V Base Counters and Timers. If the software does not use counters or performance monitoring, they can be disabled to save resources.