The primitive IOBUFDS_DCIEN_XP5 is only supported in XP5IO banks. It's function is the same as the IOBUFEDS_DCIEN
primitive supported in HP IO banks, except when the IBUFDISABLE pin is asserted, its output behaves differently than the IOBUFDS_DCIEN
in HP banks. Please pay special attention in the design that uses both IOBUFDS_DCIEN and IOBUFDS_DIFF_DCIEN_XP5.
Port Descriptions
Port
Direction
Width
Function
DCITERMDISABLE
Input
1
Control to enable/disable DCI termination. This is generally used to reduce power in long periods of an idle state.
I
Input
1
Input of OBUF. Connect to the logic driving the output port.
IBUFDISABLE
Input
1
Disables input path through the buffer and forces to a logic High. This feature is generally used to reduce power at times
when the I/O is idle for a period of time.
IO
Inout
1
Bidirectional diff_p port to be connected directly to top-level inout port.
IOB
Inout
1
Bidirectional diff_n port to be connected directly to top-level inout port.
O
Output
1
Output path of the buffer.
T
Input
1
3-state enable input signifying whether the buffer acts as an input or output.
Design Entry Method
Instantiation
Yes
Inference
No
IP and IP Integrator Catalog
No
Available Attributes
Attribute
Type
Allowed Values
Default
Description
SIM_DEVICE
STRING
"ULTRASCALE", "ULTRASCALE_PLUS"
"ULTRASCALE_PLUS"
Set the device version for simulation functionality.
USE_IBUFDISABLE
STRING
"TRUE", "FALSE", "T_CONTROL"
"TRUE"
Set this attribute to "TRUE" to enable the IBUFDISABLE pin.
Related Information
Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)
Vivado
Design Suite Properties Reference Guide (UG912)