v++ Mode VSS - v++ Mode VSS - 2026.1 English - UG1702

Vitis Reference Guide (UG1702)

Document ID
UG1702
Release Date
2026-06-23
Version
2026.1 English

Link

The v++ mode vss selects a link flow that creates a Vitis Subsystem (VSS) artifact. A VSS is a platform-independent, reusable design component that you can customize with AI Engine and PL content.

Using v++ --mode vss, you package your design elements (for example, AI Engine graphs and PL kernels, and optionally PS domains) into a subsystem that is intended to be integrated into a larger system using Vitis tools.

This flow does not generate a deployable hardware bitstream and instead produces a subsystem package with metadata and binaries for later system integration.

--mode (-m):
 -m [ --mode ] arg Specify a mode. 
                   [aie|hls] Must be used with --compile/-c option. 
                   [vss] Must be used with --link/-l option.
See Linking a VSS Component in the Embedded Design Development Using Vitis (UG1701) for details.