The platforminfo command line utility reports
platform meta-data, including information on interface, clock, valid SLRs, allocated
resources and memory. The information is in a structured format. You can reference the
information when, for example, allocating kernels to SLRs or memory resources.
The following command options are available to use with platforminfo:
| Option | Description |
|---|---|
-f [ --force
]
|
Overwrite an existing output file. |
-h [ --help
]
|
Print help message and exit. |
-k [ --keys
]
|
Get keys for a given platform. Returns a list of JSON paths. |
-l [ --list
]
|
List platforms. Searches the user repo paths $PLATFORM_REPO_PATHS and then the install locations to find .xpfm files. |
-e [ --extended
]
|
List platforms with extended information. Use with '--list'. |
-d [ --hw ]
<arg>
|
Specify the platform definition (*.xsa) on which to operate. The value must be a full path, including file name and .xsa extension. |
-s [ --sw ]
<arg>
|
Specify the software platform definition (*.spfm) on which to operate. The value must be a full path, including file name and .spfm extension. |
-p [ --platform ]
<arg>
|
AMD platform definition
(*.xpfm) on which to operate.
The value for --platform can be a full
path including file name and .xpfm
extension, as shown in example 1 below. If supplying a file name and
.xpfm extension without a path,
this utility will search only the current working directory. You can
also specify only the base name for the platform. When the value is a
base name, this utility will search the $PLATFORM_REPO_PATHS, and the
install locations, to find a corresponding .xpfm file, as shown in example 2 below.
|
-o [ --output ]
<arg>
|
Specify an output file. Default: STDOUT. |
-j [ --json ]
<arg>
|
Use JSON format for output. When used with no value, prints the entire
platform as JSON. Accepts an optional adjacent value that specifies a
JSON path. The JSON path, when valid, fetches a JSON subtree, list, or
value. |
-v [ --verbose
]
|
The platforminfo utility can generate a default, human-readable report for a given platform. The default report contains the most important characteristics of the platform. Use the verbose switch to display the full platform meta-data in human-readable form. |
Note: When using the
--help or --list options, you must specify a
platform. You can specify the platform using the --platform
option, or using either --hw, --sw. You can also insert the platform name or full path into the command
line.To understand the report and condensed output logs, review the following report. The report organizes content into specific sections to improve clarity and understanding.
platforminfo -p $PLATFORM_REPO_PATHS/xilinx_u200_gen3x16_xdma_2_202110_1.xpfmTip: See Platform info for vek385_base for an example of embedded processor platforms.
Detailed information for vek385_base platform
You can obtain detailed information for the Vitis platform by using
--verbose option with the platforminfo
command. You can find details on clocks, hardware IP parameters and hardware bus
interfaces for the specified platform.
==========================
Basic Platform Information
==========================
Platform: vek385_base
File: <path_to_platform>/vek385_base.xpfm
Description: The VEK385 Vitis base platform is designed for the VEK385 evaluation kit, enabling developers to create high-performance applications using AI and DSP engines that deliver over 10× the scalar compute performance of current server-class CPUs. This platform features a powerful heterogeneous architecture with 8 Arm® Cortex®-A78 application processors, 10 Arm® Cortex®-R5 real-time processors, and 20GB of high-speed LPDDR5X memory. It offers a robust foundation for building advanced solutions in AI, signal processing, and compute-intensive domains using AMD Versal™ adaptive SoCs.
Unique Name: <path_to_platform>/vek385_base.xpfm
Vendor: xilinx.com
Version: 1.0
Is Unified: 1
Is XPFM: 1
Is Hidden: 0
Software Emulation: 1
Hardware Emulation: 1
Hardware Platform File:
<path_to_platform>/vek385_base/hw/hw.xsa
Software Platform File:
<path_to_platform>/vek385_base/sw/vek385_base.spfm
Platform Dir:
<path_to_platform>/vek385_base
Platform Target Categories:
Category: Acceleration
Hardware: 1
Has Software Platform(s): 1
Supports Hardware Emulation Target: 1
Has Hardware Emulation: 1
=====================================
Hardware Platform (Shell) Information
=====================================
Vendor: xilinx.com
Board: vek385_1_base
Name: vek385_1_base
Unique Name: xilinx.com:vek385_1:vek385_1_base:1.0
Pretty Name: vek385_1_base
Version: 1.0
Version Major: 1
Version Minor: 0
Generated Version: 2026.1
Generated Change List: 6440735
Generated Timestamp: Mon Apr 20 23:36:14 2026
Description:
Detailed Description:
Is Unified: 1
Is Extensible: 1
Supports Hardware Target: 1
Is a Hardware Emulation Platform: 0
Host Architecture: unknown
Host Interface: unknown
Uses PR: 0
Platform State: pre_synth
Top Module Name: vitis_design_wrapper
Accelerator Binary Format xclbin2
Accelerator Binary Content pdi
DCP Function Stripped 0
Is DCP Encrypted 0
FPGA Family: versal
FPGA Device: xc2ve3858
Board Vendor: xilinx.com
Board Name: xilinx.com:vek385_1:1.0
Board Part: xc2ve3858-ssva2112-2MP-e-S
Board Image HDPI: vek385_image.png
Board Image MDPI:
Board Image LDPI:
==============
AIE Partitions
==============
Start Col: 0
# Columns: 36
Number of DDRs: 0
Memory Type: ddr4
Memory Size: 8 GB
BRAM Count: 1342
DSP Count: 2064
LUT Count: 543104
FF Count: 1086208
URAM Count: 0
Register Count: 1085673
Hardware Bus Interface Max Width: 512
=====================
Available Resources
=====================
NoC PL NSU: 24
NoC PL NMU: 30
=================
Clock Information
=================
Default Clock Index: 1
Default Clock Frequency: 312.496875
Default Clock Pretty Name: PL 1
Clock Index: 0
Frequency: 624.993750
Status: fixed_non_ref
Name: clk_wizard_0_clk_out1_o1
Pretty Name: PL 0
Inst Ref: clk_wizard_0
Comp Ref: clkx5_wiz
Period: 1.600016
Normalized Period: .001600
Clock Index: 1
Frequency: 312.496875
Status: fixed_non_ref
Name: clk_wizard_0_clk_out1_o2
Pretty Name: PL 1
Inst Ref: clk_wizard_0
Comp Ref: clkx5_wiz
Period: 3.200032
Normalized Period: .003200
Clock Index: 2
Frequency: 156.248437
Status: fixed_non_ref
------------------------------------
------ more clock information ------
------------------------------------
========================
AIE Hardware Information
========================
Arch: AIE2PS
NPI Base Address: 0xf6d50000
AXI Base Address: 0x20000000000
Shim Row Start: 0 # Rows: 1
Core Row Start: 3 # Rows: 4
Mem Row Start: 1 # Rows: 2
Device Info...
Device Name: fpga0
Device Type: 8
Fpga Part: versal:xc2ve3858:ssva2112:-2MP:e:S
Number of SLRs: 1
Dynamic Region Info...
Dynamic Region Name: OCL_REGION_0
Dynamic Region Type: clc_region
Dynamic Region Instance Path:
==========
Valid SLRs
==========
SLR0
=====================
Resource Availability
=====================
=====
Total
=====
LUTs: 542586
FFs: 1085673
BRAMs: 1342
DSPs: 2064
==================
Memory Information
==================
Bus SP Tag: AIE
Bus SP Tag: LPDDR
Bus SP Tag: LPDDR01
Bus SP Tag: LPDDR23
Bus SP Tag: LPDDR4
Hardware IP Parameters...
Hardware IP Parameter Name: NUM_SI
IP Param Value: number(count($designComponent/xd:connection/xd:busInterface[@xd:instanceRef=$instance and starts-with(@xd:name,'AIE_ConfigNoc_S') and starts-with(substring(@xd:name, string-length(@xd:name)-3, 4),'_AXI')])+0)
IP Param Inst Ref: AIE_ConfigNoc
IP Param Comp Ref: axi_noc2
IP Param IsValid: 'true'
Hardware IP Parameter Name: NUM_MI
IP Param Value: number(count($designComponent/xd:connection/xd:busInterface[@xd:instanceRef=$instance and starts-with(@xd:name,'AIE_ConfigNoc_M') and starts-with(substring(@xd:name, string-length(@xd:name)-3, 4),'_AXI')])+1)
IP Param Inst Ref: AIE_ConfigNoc
IP Param Comp Ref: axi_noc2
IP Param IsValid: 'true'
-----------------------------------------
------ more Hardware IP Parameters ------
-----------------------------------------
Hardware Bus Interfaces...
Hardware Bus Name: AIE_ConfigNoc_S00_AXI
Bus Mode: slave
Bus Inst Ref: AIE_ConfigNoc
Bus Comp Ref: axi_noc2
Bus Type Ref: aximm
Bus Intf Ref: S00_AXI
Bus Clock Ref: __UNKNOWN__
Bus Reset Ref: AIE_ConfigNoc_aresetn
Bus Mem Port: S_AXI_NOC
Bus SP Tag: AIE
Bus Direction:
Bus Address Segment:
Bus Memory Instance:
Bus Slr: default
Bus Size
Bus Peak Memory BW:
Bus Category:
Bus Auto: false
Bus Max Masters: 0
Bus Data Width: 512
Bus Id Bits: 0
Bus Isr Id: 0
Hardware Bus Name: AIE_ConfigNoc_S01_AXI
Bus Mode: slave
Bus Inst Ref: AIE_ConfigNoc
Bus Comp Ref: axi_noc2
Bus Type Ref: aximm
Bus Intf Ref: S01_AXI
Bus Clock Ref: __UNKNOWN__
Bus Reset Ref: AIE_ConfigNoc_aresetn
Bus Mem Port: S_AXI_NOC
Bus SP Tag: AIE
Bus Direction:
Bus Address Segment:
Bus Memory Instance:
Bus Slr: default
Bus Size
Bus Peak Memory BW:
Bus Category:
Bus Auto: false
Bus Max Masters: 0
Bus Data Width: 512
Bus Id Bits: 0
Bus Isr Id: 0
Hardware Bus Name: AIE_ConfigNoc_S02_AXI
Bus Mode: slave
Bus Inst Ref: AIE_ConfigNoc
Bus Comp Ref: axi_noc2
Bus Type Ref: aximm
Bus Intf Ref: S02_AXI
Bus Clock Ref: __UNKNOWN__
Bus Reset Ref: AIE_ConfigNoc_aresetn
Bus Mem Port: S_AXI_NOC
Bus SP Tag: AIE
Bus Direction:
Bus Address Segment:
Bus Memory Instance:
Bus Slr: default
Bus Size
Bus Peak Memory BW:
Bus Category:
Bus Auto: false
Bus Max Masters: 0
Bus Data Width: 512
Bus Id Bits: 0
Bus Isr Id: 0
------------------------------------------
------ more Hardware Bus Interfaces ------
----------------------------------------
--
Hardware Platform Archive Files
File Type & Name: ROUTED_DCP : hw_routed.dcp
File Type & Name: HPFM : hw.hpfm
File Type & Name: REBUILD_TCL : prj/rebuild.tcl
File Type & Name: TOP_BD : prj/my_project.srcs/sources_1/bd/vitis_design/vitis_design.bd
File Type & Name: IP_CACHE_DIR : ipcache
File Type & Name: BOARD_REPO_PATH : board
File Type & Name: NOC_TRAFFIC : hw.nts
File Type & Name: NOC_SOLUTION : hw.ncr
File Type & Name: AIEPRJ : vitis_design.aieprj
File Type & Name: ISD : hw.isd
=============================
Software Platform Information
=============================
Number of Runtimes: 2
Default System Configuration: vek385_base
System Configurations:
System Config Name: vek385_base
System Config Description: The VEK385 Vitis base platform is designed for the VEK385 evaluation kit, enabling developers to create high-performance applications using AI and DSP engines that deliver over 10× the scalar compute performance of current server-class CPUs. This platform features a powerful heterogeneous architecture with 8 Arm® Cortex®-A78 application processors, 10 Arm® Cortex®-R5 real-time processors, and 20GB of high-speed LPDDR5X memory. It offers a robust foundation for building advanced solutions in AI, signal processing, and compute-intensive domains using AMD Versal™ adaptive SoCs.
System Config Default Processor Group: xrt
System Config Default Boot Image: standard
System Config Is QEMU Supported: 1
System Config Processor Groups:
Processor Group Name: aiengine
Processor Group CPU Type: ai_engine
Processor Group m_os Name: aiengine
Processor Group Name: xrt
Processor Group CPU Type: cortex-a78
Processor Group m_os Name: xrt
System Config Boot Images:
Boot Image Name: standard
Boot Image Type:
Boot Image BIF:
Boot Image Data:
Boot Image Boot Mode:
Boot Image RootFileSystem:
Boot Image Mount Path:
Boot Image Read Me:
Boot Image QEMU Args: qemu/pmc_args.txt:qemu/qemu_args.txt
Boot Image QEMU Boot:
Boot Image QEMU Dev Tree:
Supported Runtimes:
Runtime: C/C++
Runtime: XRT