--debug Options - --debug Options - 2026.1 English - UG1702

Vitis Reference Guide (UG1702)

Document ID
UG1702
Release Date
2026-06-23
Version
2026.1 English

This option enables debug IP core insertion in the device binary (.xclbin) for hardware debugging. This option lets you specify the type of debug core to add, and which compute unit and interfaces to monitor with ChipScopeā„¢ as described in Debugging During Hardware Execution in the Data Center Acceleration using Vitis (UG1700).

The --debug.xxx options lets you attach AXI protocol checkers and System ILA cores at the interfaces to kernels or specific compute units (CUs). You can use --debug.xxx for debugging and performance monitoring purposes.

  • The System Integrated Logic Analyzer (ILA) provides transaction level visibility into an accelerated kernel or function running on hardware. You can also capture and view AXI traffic of interest by using the System ILA core.
  • The AXI Protocol Checker debug core monitors AXI interfaces on the accelerated kernel. When attached to an interface of a CU, the AXI Protocol Checker actively checks for protocol violations and provides an indication of which violation occurred.

Specify the --debug.xxx commands in a configuration file. Specify the commands in the [debug] section head using the following format as an example.

[debug]
protocol=all:all           # Protocol analyzers on all CUs
protocol=cu2:port3         # Protocol analyzer on port3 of cu2
chipscope=cu2              # ILA on cu2

The various options of --debug include the following:

--debug.aie.chipscope

--debug.aie.chipscope <interface_name> | <adf_graph_arg_name>

Enables hardware debug for the Versal AI Engine through ChipScope. The <interface_name> argument applies to non-PL kernel interfaces such as AI Engine PLIO interfaces, or AXIS interfaces. The <adf_graph_arg_name> specifies arguments of the graph.

--debug.chipscope

--debug.chipscope <cu_name>[:<interface_name>]

Adds the System Integrated Logic Analyzer debug core to the specified CUs in the design.

Important: The --debug.chipscope option requires the <cu_name> to be specified and does not accept the keyword all. You can optionally specify an <interface_name>.

For example, the following command adds an ILA core to the vadd_1 CU:

v++ --link --debug.chipscope vadd_1

--debug.list_ports

Shows a list of valid compute units and port combinations in the current design. This is informational to help you with crafting a command line or config file for the --debug command.

This option needs to be specified during linking, but does not run the linking process. The following example illustrates the elements that the command line requires. The elements returns the available ports when linking the kernels with the listed platform.

v++ --platform <platform> --link --debug.list_ports <kernel.xo>

--debug.protocol

--debug.protocol all|<cu_name>[:<interface_name>]

Adds the AXI Protocol Checker debug core to the design. This can be specified with the keyword all, or the <cu_name> and optional <interface_name> to add the protocol checker to the specified CU and interface.

For example:

v++ --link --debug.protocol all