The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 06/23/2026 Version 2026.1 | |
| Viewing Multiple AI Engine Partitions | Added new topic to describe how to build, open, visually identify, aggregate, trace, and constrain multi-partition AI Engine designs in the Vitis Analyzer Analysis view. |
| Trace Support for DFX Designs | Added the Trace Support for DFX Designs topic describing AI Engine event-trace capture on Versal DFX platforms. |
| --connectivity Options | Clarified that
--connectivity.noc.read_bw and
--connectivity.noc.write_bw require a bandwidth
value greater than 0 |
| Component Based Flow Design Debug | Added the QEMU Configuration File and Application Run Script options to the Start Emulator dialog description, and noted that the Vitis Unified IDE recalls the last-used values in this dialog (including for user-managed). |
| Creating a System Project for Heterogeneous Computing | Added a "System Project Output Folder and Logical View" subsection that lists the unified build artifacts (Application ELF, DTBO, PDI, XCLBIN) and describes the virtual folder in the Components view. |
| VFS Application Launch Configuration | This new topic documents how to attach the Vitis Unified IDE debugger to a running VFS Python or MATLAB process. |
| platforminfo Utility | Added information for vek385_base platform showing
example platforminfo --verbose output, including
basic platform info, hardware shell details, AI Engine partitions, clocks, valid SLRs,
resource availability, memory and bus interfaces, archive files, and
software platform/runtime information. |
| Using AI Features of the Vitis Unified IDE | This new topic documents API key configuration, the Theia AI Chat panel and agents, the AMD Model Context Protocol (Vivado-doc-server), and skills setup. |
| Schedule Viewer | Restructured the Properties View definition lists into two-column tables, and added a new Memory Schedule Viewer subtopic describing cross-probing between the Memory Schedule viewer, the Schedule Viewer, and source code. |
| launch_emulator Utility | Added the -qemu-config and -foward-port options to the launch_emulator Utility table for the segmented configuration flow, and documented the default user partition that the launch script mounts on Versal RF Series and Telluride devices when -run-app is used. |
| Running C Synthesis | Added section on Specifying Interface Defaults and General Settings. |
| HLS General Options | Removed flow_target
|
| Interface Configuration | Removed syn.interface.default_slave_interface and added
syn.interface.default_axi. |
| platforminfo Utility |
Deprecated |
| Possible Input Combinations for the Integration Project | Expanded the Vitis Subsystem (VSS) column in the Possible Input Combinations table to list PL KERNELS, AIE GRAPH, PL KERNEL + AIE GRAPH, PL KERNEL + VSS, AIE GRAPH + VSS, and VSS1 + VSS2 as supported inputs. |