HLS General Options - 2025.2 English - UG1702

clock

Specifies the clock period in ns or MHz (ns is default). If you don't provide a period, the system uses a default period of 10 ns.

clock=8ns

Important: If your HLS configuration file uses platform= instead of part= then you must also specify freqhz= instead of clock= as shown here to change the default clock frequency of the platform.

clock_uncertainty

Specifies the clock period as a margin of uncertainty by HLS. The system subtracts the margin of uncertainty from the clock period to create an effective clock period. The clock uncertainty is in units of ns, or as a percentage of the clock period. The clock uncertainty defaults to 27% of the clock period. When specifying a value, the default unit is ns but % or MHz can also be used.

clock_uncertainty=15%

flow_target

Sets the flow target to synthesize either a Vitis kernel (vitis) or a Vivado IP (vivado). The Application Acceleration flow uses the AMD Vitis™ kernel, while the embedded design flow uses the Vivado IP.

Important: Vivado IP and Vitis kernels have differences in the interface definition.

relative_roots

Specify an ordered list of one or more absolute paths. The list is searched to resolve relative file paths of source files and cflags include paths with similar behavior to PATH environment variable. The first entry of the list can also be used as the root of any output files paths that are relative.

All entries in the relative_roots list must be an absolute path or be a path that starts with one of the following which have special meaning:

• file: directory that contains the config file where the relative_root is specified
• cwd: current working directory of the v++/vitis-run process

The list of relative_roots can be specified via multiple entries in a config file. Each successive value appends to the list of entries. Within each entry multiple paths can be specified with a semicolon separator. Whitespace before and after the semicolon is ignored/removed.

[hls]
relative_roots=/tmp/aaa ; /tmp/bbb ; file/../ccc ; cwd
syn.file=top.cpp

Note: If relative_roots is specified on the v++/vitis-run command it will be ignored and cause a warning message.

C-Synthesis Sources

syn.cflags

Defines compilation flags applying to all syn.file defined source files for use during synthesis.

syn.cflags=-I../../src/

syn.csimflags

Defines compilation flags to be applied to all syn.file source files for use during C-simulation or RTL/Co-simulation.

syn.file

Specifies the file path and name of a source file to be used during synthesis of the HLS component. Multiple files require multiple syn.file statements.

Specify the file paths as either absolute or relative. Relative paths are relative to the location of the config file, whether inside the HLS component or outside the component.

syn.file=../../src/dct.cpp

syn.file_cflags

Applies a compilation flag for synthesis to the specified source file. Specify the file path and name first, followed by a comma, followed by the cflags:

syn.file_cflags=../../src/dct.cpp,-I../../src/

syn.file_csimflags

Applies a compilation flag for simulation to the specified source file. Specify the file path and name first, followed by a comma, followed by the csimflags.

syn.file_csimflags=../../src/dct.cpp,-Wno-unknown-pragmas

syn.blackbox.file

Specifies the JSON file for an RTL blackbox. The HLS compiler uses this file during synthesis and when running RTL/Co-simulation.

syn.blackbox.file=../../RTL/fft.json

syn.top

Specifies the name of the function synthesized as the top-level function for the HLS component. Helps identify the top function in source code that defines multiple functions.

syn.top=dct

Important: Functions that the top-level function calls also become part of the HLS component.

Test Bench Sources

tb.cflags arg

Defines compilation flags for all source files defined in tb.file for simulation or co-simulation.

tb.cflags=-Wno-unknown-pragmas

tb.file arg

Specifies the file path and name of a test bench source file for HLS component simulation or co-simulation. Multiple files require multiple tb.file statements.

The file paths can be either absolute or relative. Relative paths are relative to the location of the config file, whether inside the HLS component or outside the component.

tb.file=../../src/dct_test.cpp

tb.file_cflags arg

Applies a compilation flag for simulation or co-simulation to the specified test bench source file. Specify the file path and name first, followed by a comma, followed by the cflags:

syn.file_cflags=../../src/dct.cpp,-Wno-unknown-pragmas