Creating a System Project for Heterogeneous Computing - 2024.2 English - UG1702

Vitis Reference Guide (UG1702)

Document ID
UG1702
Release Date
2025-01-15
Version
2024.2 English

The Vitis Unified IDE manages designs at the component level and the System project level. The top-level System project can contain different components all of which can be separately developed, built, and analyzed in the new Vitis Unified IDE.

Embedded System Project

For a system project targeting embedded platform, the following components are integrated into a single heterogeneous system as shown in the next figure.

  • Application Component for PS
  • AI Engine Component (graph)
  • HLS Component
  • RTL Kernel
  • Platform Component
Figure 1. Vitis Accelerated Embedded Flow

Data Center System Project

For a system project targeting data center acceleration using AMD FPGA-based Alveo Accelerator cards, the following components are integrated as shown in the figure below:

  • Application Component running on x86
  • C/C++ HLS Component (PL Kernel)
Figure 2. Vitis Accelerated Data Center Flow