The syn.compile commands specify
the default behavior for compilation of the HLS component.
- syn.compile.design_size_max_warning
- Specifies the design size that triggers a warning related
to slow compilation or poor QoR.
syn.compile.design_size_maximum_warning=300000 - syn.compile.enable_auto_rewind
-
When set to true, enables an alternative HLS implementation for pipelined loops that uses automatic loop rewind. See the Rewinding Pipelined Loops for Performance section of the Vitis High-Level Synthesis User Guide (UG1399) for additional information.
syn.compile.enable_auto_rewind=1 - syn.compile.ignore_long_run_time
-
Disables the long runtime warning.
syn.compile.ignore_long_run_time=1 - syn.compile.name_max_length <arg>
-
Specifies the maximum length of function names. If the length is over the threshold, the system truncates the last part of the name.
syn.compile.name_max_length=13 - syn.compile.no_signed_zeros
-
The
no_signed_zerosoption ignores the signedness of floating point zero. By ignoring the signedness, the compiler can perform aggressive optimizations on floating point operations.syn.compile.no_signed_zeros=1 - syn.compile.performance_budgeter
-
By enabling this option, the top-level performance pragma conducts a comprehensive, design-wide performance analysis. Much like selecting the most efficient route from point A to point B among many possibilities, the analysis considers multiple optimization strategies across the entire design. This analysis helps identify the best path to meet performance targets.
enable: Activates the performance budget for a comprehensive, design-wide performance analysis.
disable: Deactivates the performance budget, preventing any comprehensive analysis.
auto: Automatically enables design-wide performance analysis if the system detects a performance pragma.
- syn.compile.pipeline_flush_in_task arg
-
Specifies that pipelines in
hls::tasksis flushing (flp) by default to reduce the probability of deadlocks in C/RTL Co-simulation. This option applies to pipelines that achieve an II=1 with the default option ofii1. However, you can also specify it as applyingalwaysto enable flushing pipelines in eitherhls::tasksor dataflow, or can be completely disabled usingnever. - syn.compile.pipeline_loops arg
-
Loops with a tripcount equal to or greater than the value you specify in this setting is pipelined automatically.
syn.compile.pipeline_loops=20 - syn.compile.pipeline_style arg
-
Set default pipeline style, this is a preference not a hard constraint. Refer to Flushing Pipelines and Pipeline Types in Vitis High-Level Synthesis User Guide (UG1399) for more information. The three styles are: stallable (
stp), flushable (flp), and free-running (frp). The default is free-running.syn.compile.pipeline_style=flp - syn.compile.pragma_strict_mode
-
Enable errors instead of warnings for unrecognized and improper pragma syntax.
syn.compile.pragma_strict_mode=1 - syn.compile.unsafe_math_optimizations
-
The
unsafe_math_optimizationsoption ignores the signedness of floating point zero and enables associative floating point operations. Allows compiler to do aggressive optimizations on floating point operations.syn.compile.unsafe_math_optimizations=1Important: Using this option can change the result of any floating point calculations and result in a mismatch in C/RTL co-simulation. Ensure your test bench is tolerant of differences and checks for a margin of difference, not exact values.
- syn.compile_use_csim_directives
-
Use directives generated by C simulation during C synthesis. Default is
false.syn.compile_use_csim_directives=true