The Vitis Integrated Flow prioritizes the ease of use and automation for rapid prototyping and deployment. It leverages a prebuilt Vivado base platform design, or alternatively allows you to reuse a custom Vivado platform. Vitis handles the linking process, automating synthesis and implementation through a temporary Vivado project, minimizing user interaction. A simplified overview of the flow is represented in the following figure:
This flow starts with selecting a device part or board. For AMD development boards, AMD provides ready-to-use base platforms, eliminating the need for manual platform creation. The steps on how to create a custom platform are described in Building Custom Platforms.
Next, Vitis applications extend the hardware design with a modular heterogeneous subsystem, represented by PL kernels and AIE graph, and provide an environment for software application development, verification and debugging. Developing Vitis Kernels and Applications describes how to design and compile the subsystem, and the section on Integrating AIE and PL Components describes how to connect it to the hardware design. In addition, the software host application development requires the preparation of dependencies described in Software Platform.
For standalone Bare-metal, RTOS and non-XRT applications, the board support package and device driver software headers is generated from the output of v++ linker. The software platform can be created using the fixed XSA as input, which can be used to generate the required board support packages.
The Vitis Package step combines hardware binaries and software executable into a deliverable package, generating files for SD Card or binary containers for QSPI Flash. The section on Integrating the System describes the process of packaging the design.
Finally, the system is deployed and run on the hardware or in a hardware/software simulator called Vitis hardware emulator. More details can be found in Deploying and Running the System.
Key features of this flow include:
- Rapid prototyping and deployment: Prebuilt or custom Vivado base platform designs expedite development.
- Automated linking: Vitis handles synthesis and implementation, minimizing user interaction.
- Modular heterogeneous subsystems: Extending the hardware design with PL kernels and AIE graphs.
- Integrated software development environment: Developing, verifying, and debuging software applications.
- Deliverable package creation: Combining hardware binaries and software executables for easy deployment.
While the Vitis Integrated Flow fully
supports AMD
Versal and MPSoC embedded software flows, the Xilinx Runtime (XRT) offers complementary Linux
userspace APIs for controlling Vitis components
packaged into xclbin binaries. This eliminates the
need for custom kernel drivers or device trees for the Vitis content, and provides a compact and readable host application
coding style.
For more fine grained control over synthesis and implementation in Vivado, consider the Vitis Export to Vivado Flow.