Packaging Segmented Configuration - 2025.2 English - UG1701

Embedded Design Development Using Vitis User Guide (UG1701)
Document ID
UG1701
Release Date
2025-11-20
Version
2025.2 English
The packaging process for segmented configuration has two steps. The first step is for extracting the loading and configuration meta-data for PL and AI Engine. The second step is for combining that with the PS and NoC DDRMC boot and configuration. For Versal AI Edge Series Gen 2, Versal Prime Series Gen 2, and Versal Premium Series Gen 2, segmented configuration is mandatory and v++ --package automatically identifies it require to create both artifacts. For first generation Versal devices, you need to run v++ --package a second time to create a SD card.
Note: If EDF is used, the PDI and dtbo needs to be added to the EDF wic image, see AMD Embedded Development Framework.
Note: Segmented configuration is primarily for separating the boot process and loading the PL/AIE running Linux on hardware. For hardware emulation, the boot and load is performed in one step, see Packaging the System in HW Emulation.

The PL/AIE package require these inputs:

v++ -p -s \
  -f <fixed_design>.xsa \
  <graph_name>.libadf \
  --package.out_dir <path_to_sdcard> \
  -o <design_name>.xclbin

To create a SD card combining the boot artifacts, Linux, host application and the prepared PL/AIE, run v++ package a second time using the following inputs.

v++ -p -t hw \
  -f <fixed_design>.xsa \
  <graph_name>.libadf \
  --package.generate_sdcard \
  --package.defer_aie_run \
  --package.dtb <vitis_workspace>/<pfm_name>/export/<pfm_name>/sw/boot/system.dtb \
  --package.image_format <ext4|fat32> \
  --package.bl31_elf <path_to_linux>/bl31.elf \
  --package.uboot <path_to_linux>/uboot.elf \
  --package.sd_file <path_to_linux>/Image \
  --package.sd_file <path_to_linux>/boot.scr \
  --package.sd_file <host_app>.exe \
  --package.sd_file <design_name>.xclbin \
  --package.sd_file <path_to_sdcard>/<PL_PDI_NAME>.pdi \
  --package.sd_file <path_to_sdcard>/<PL_PDI_NAME>.dtbo \
  --package.out_dir <path_to_sdcard> \
  -o <design_name>.xclbin

On hardware, load the second stage after the PS/NoC boot procedure completes using the fpgautil tool.

fpgautil -b <PL_PDI_NAME>.pdi -o <PL_PDI_NAME>.dtbo

The PL.pdi represents the PL and AI Engine design. PL.dtbo represents the device tree blob overlay containing the meta-data information on how to configure and setup the PL. XRT queries the XCLBIN file for controlling the PL and AIE graph when the host application executes.