Design Recommendations for RTL Kernels - 2025.2 English - UG1701

Embedded Design Development Using Vitis User Guide (UG1701)

Document ID
UG1701
Release Date
2025-11-20
Version
2025.2 English

RTL kernels should be designed with recommendations from the UltraFast Design Methodology Guide for FPGAs and SoCs (UG949). In addition to adhering to the interface and packaging requirements, the kernels should be designed with the following performance goals in mind.