After the linking step is complete, any reports generated during this process are collected into the <kernel_name>.link_summary. This collection of reports can be viewed by opening the link_summary in the Analysis view of Vitis analyzer, and includes a Summary report, System Estimate providing timing and resources estimates andSystem Guidance offering suggestions for improving linking and the performance of the system. Refer to Working with the Analysis View (Vitis Analyzer) in the Vitis Reference Guide (UG1702) for additional information.
The linking process defines important architectural details of the system design. In particular, this is where the design is enabled for profiling or debug, where you specify the number of kernel instances to instantiate into hardware, where kernel instances are assigned to SLRs, and where you define connections from PL kernel ports to global memory or to AI Engine applications. The following sections discuss some of these build options: Profiling and Tracing the Application and Debugging System Projects.