The first step when building the application is to specify a build target. The build target of the AMD Vitis™ tool defines the nature and contents of the FPGA binary (.xclbin) created during compilation and linking. There are two different build targets: one emulation target used for validation and debugging purposes: hardware emulation, and the default system hardware target used to generate the FPGA binary (.xclbin) loaded into the AMD device.
Compiling the emulation target is significantly faster than compiling for the real hardware. The emulation run is performed in a simulation environment, which offers enhanced debug visibility and does not require an actual accelerator card.
| Hardware Emulation | Hardware Execution |
|---|---|
| Host application runs with a simulated RTL model of the kernels. SystemC models and external TGs are also supported. | Host application runs with actual hardware implementation of the kernels. |
| Test the host / kernel integration, get performance estimates. | Confirm that the system runs correctly and with desired performance. |
| Best debug capabilities, moderate compilation time with increased visibility of the kernels. | Final FPGA implementation, long build time with accurate (actual) performance results. |