References - 2024.2 English - UG1700

These documents provide supplemental material useful with this guide.

1. Vitis Software Platform Release Notes (UG1742)
2. Embedded Design Development Using Vitis (UG1701)
3. Vitis Reference Guide (UG1702)
4. Introduction to FPGA Design with Vivado High-Level Synthesis (UG998)
5. Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)
6. Vitis High-Level Synthesis User Guide (UG1399)
7. UltraFast Design Methodology Timing Closure Quick Reference Guide (UG1292)
8. UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)
9. RAMA LogiCORE IP Product Guide (PG310)
10. Vitis Unified Software Platform Tutorials Landing Page (UG1605)
11. Vivado Design Suite User Guide: Using Tcl Scripting (UG894)
12. Vivado Design Suite Tcl Command Reference Guide (UG835)
13. Vivado Design Suite User Guide: Creating and Packaging Custom IP (UG1118)
14. Alveo U55C Data Center Accelerator Cards Data Sheet (DS978)
15. PetaLinux Tools Documentation: Reference Guide (UG1144)
16. Vivado Design Suite User Guide: Logic Simulation (UG900)
17. Getting Started with Alveo Data Center Accelerator Cards (UG1301)
18. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
19. Alveo U50 Data Center Accelerator Cards Data Sheet (DS965)
20. Xilinx Stacked Silicon Interconnect Technology Delivers Breakthrough FPGA Capacity, Bandwidth, and Power Efficiency (WP380)