The Device Binary (.xclbin file) contains the bitstream and other metadata needed to
program the FPGA accelerator card. It it built by compiling the acceleration kernels and
linking them with the extensible platform.
Figure 1. Device Build Process
The process, as outlined above, has two steps:
- Compile the acceleration kernels from source code.
- For C, C++ kernels, the
v++ -c --mode hlscommand compiles the source code into object (XO) files. Multiple kernels are compiled into separate XO files. - For RTL kernels, the Vivado IP packager produces the XO file to be used for linking. Refer to Packaging RTL Kernels for more information.
- For C, C++ kernels, the
- After compilation, the
v++ -lcommand links one or multiple kernel objects (XO), together with the hardware platform, to produce the Xilinx binary .xclbin file.
The following sections describe building the different components of the system design to produce the device binary.
Tip: The
v++ command can be used from the command line, in scripts, or a build
system like make, and can also be used through
the Vitis unified IDE as discussed in
Using the Vitis
Unified IDE in the Vitis Reference Guide (UG1702).