Aim for Functions with a Single Loop Nest - 2024.2 English - UG1700

Data Center Acceleration Using Vitis User Guide (UG1700)

Document ID
UG1700
Release Date
2025-01-15
Version
2024.2 English

As a general rule, if a function has sequential loops in it, these loops execute sequentially in the hardware implementation generated by the HLS compiler. This is usually not desirable, as sequential execution hampers throughput.

However, if these sequential loops are pushed into sequential functions, then the HLS compiler can apply the dataflow optimization and generate an implementation that allows the pipelined and overlapping execution of each task. For more information on the dataflow optimization, see Task Parallelism Using Different Kernels in the Data Center Acceleration using Vitis (UG1700).

During this partitioning and refining process, put sequential loops into individual functions. Ideally, the lowest-level compute block should only contain a single perfectly-nested loop.