Flow Offload Reference Pipeline User Guide (UG1670)

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1.1 English

The P4 Flow Offload reference pipeline is a software framework that you can use for the offloading of packet processing from a general purpose CPU to a programmable match processing unit (MPU). You do this by compiling P4 programs, which are high-level descriptions of packet processing logic, into instructions that can be executed by the programmable software in an MPU.

The P4 Flow Offload reference pipeline is a cornerstone for other reference pipelines, as it builds the foundation for the forwarding plane. It also provides a common framework for development and deployment of P4 pipelines that use flow offload, such as network security group (NSG) policy, network address translation (NAT), or load balancing, which can be leveraged for building an end-to-end solution.

Some of the key benefits of using flow offload in P4 pipelines are:

Improved performance
Flow offload can improve the performance of the P4 pipeline by offloading computationally intensive tasks to the hardware accelerator, reducing CPU utilization and increasing connections per second (CPS) and packets per second (PPS).
Reduced Latency
Flow offload can reduce the latency of the P4 pipeline by offloading tasks that would otherwise have to be processed by software on the host server.
Increased scalability
Flow offload can increase the scalability of a range of attributes by optimizing software resources, freeing up resources to handle more traffic load, route lookup, policy rule, filters, and similar tasks.
Flow offload allows you to customize different types of hardware acceleration and support multiple types of network packets.

This guide covers the essential concepts of flow offload in the context of AMD Pensando™ DPUs. Flow offload is a fundamental technique used to accelerate packet processing and improve network performance by selectively offloading specific or all traffic flows from traditional CPU-based processing to the highly efficient P4 DPU. The Flow Offload reference pipeline only scratches the surface of the Pensando DPU’s capabilities, providing you with an introduction to flow/session aware data plane features such as firewall, load balancer, Cloud software-defined networking (SDN), and intrusion prevention system (IPS). With the flexibility of P4 design, you can write new P4 code or modify the provided P4 code to accommodate your protocol requirements (such as Virtual Extensible LAN (VxLAN) / Network Virtualization using Generic Routing Encapsulation (NVGRE) overlays) or to add new services (for example, NAT for a server load balancer).

This guide takes you through this reference pipeline, exploring the key components, design principles, and practical implementations of flow offload in P4 DPUs. This guide serves as a comprehensive resource for network operators and developers seeking to harness the full potential of P4-based DPUs for optimizing packet processing and enabling cutting-edge network applications.

Support for additional capabilities is planned for future releases, such as:

  • Migration or “lift and shift” scenario
  • Network-to-host
  • Host-to-host