Trace Encoder Instruction Features Register (trTeInstFeatures) - Trace Encoder Instruction Features Register (trTeInstFeatures) - 2026.1 English - UG1629

MicroBlaze V Processor Reference Guide (UG1629)

Document_ID
UG1629
Release_Date
2026-07-31
Version
2026.1 English

The following table lists the Trace Encoder Instruction Features Register implemented fields. The optional fields trTeInstNoAddrDiff, trTeInstNoTrapAddr, trTeInstEnSequentialJump, trTeInstEnImplicitReturn, trTeInstEnBranchPrediction, trTeInstEnJumpTargetCache, trTeInstImplicitReturnMode, trTeInstEnRepeatedHistory, trTeInstEnAllJumps, and trTeInstExtendAddrMSB are not implemented.

Figure 1. Trace Encoder Instruction Features Register
Table 1. Trace Encoder Instruction Features Register
Bits Name Description Reset Value
31:28 trTeSrcBits The number of bits in the trace source field (0..12), 0010
27:16 trTeSrcId Trace source ID assigned to this trace encoder. 000000000000