Scrubbing Methods - 2025.2 English - UG1629

Scrubbing is performed using specific methods for the different block RAMs:

Instruction and data caches

The instruction and data caches are invalidated by executing a fence.i instruction. This forces the cache to reload the cache line from external memory.

Memory Management Unit UTLB

The entire UTLB is invalidated by doing a sfence.vma instruction.

Branch target cache

The entire BTC is invalidated by doing a fence.i instruction.

LMB block RAM

All addresses in the memory are cyclically read and written, thus correcting any single bit errors on each address. If memory protection in the PMP or MMU is enabled, it must be configured to allow reading and writing of the LMB memory.

It is also possible to add interrupts for correctable errors from the LMB Block RAM Interface Controllers, and immediately scrub this address in the interrupt handler, although in most cases it only improves reliability slightly.

The failing address can be determined by reading the Correctable Error First Failing Address register in each of the LMB Block RAM Interface Controllers.

To generate an interrupt, C_ECC_STATUS_REGISTERS must be set to 1 in the connected LMB Block RAM Interface Controllers. To read the failing address, C_CE_FAILING_REGISTERS must be set to 1.