With debugging enabled, MicroBlaze V provides program trace, storing information in the Embedded Trace Buffer or sending it through the MDM V to external trace, to enable program execution tracing. Program trace is implemented according to the RISC-V N-Trace (Nexus-based Trace) Specification. The Embedded Trace Buffer is provided by a Trace RAM Sink, as specified in the RISC-V Trace Control Interface Specification. The external trace is sent to the MDM V where is is implement as a Trace PIB Sink.
The external trace is enabled using the
C_DEBUG_EXTERNAL_TRACE parameter. The size of the Embedded Trace
Buffer can be configured from 4 KB to 128 KB using the parameter C_DEBUG_TRACE_SIZE. By setting C_DEBUG_TRACE_SIZE to 0 (None) and C_DEBUG_EXTERNAL_TRACE to 0 (None), program trace is disabled.
RISC-V N-Trace uses compression to reduce the amount of trace data, while still allowing reconstruction of the program execution flow. The Trace Encoder supports both Branch Trace Messaging (BTM) and History Trace Messaging (HTM). In general, HTM is preferred, as it usually gives better compression.
The memory/mapped registers used to configure and control trace, and to read the Trace Buffer, are listed in the following table.
| Register Name | Offset | Reset Value | R/W | Description |
|---|---|---|---|---|
| Trace Encoder | ||||
| trTeControl | 0x2000 | 0x1000000 | R/W | Trace Encoder control register |
| trTeImpl | 0x2004 | 0x15 | R | Trace Encoder implementation information |
| trTeInstFeatures | 0x2008 | 0x0 | R/W | Extra instruction trace encoder features and trace source IDs |
| trTsControl | 0x2040 | 0x30 | R/W | Timestamp control register |
| trTsCounterLow | 0x2048 | 0x0 | R | Lower 32 bits of timestamp counter |
| trTsCounterHigh | 0x204C | 0x0 | R | Upper bits of timestamp counter |
| Trace RAM Sink | ||||
| trRamControl | 0x3000 | 0x0 | R/W | RAM Sink control register |
| trRamImpl | 0x3004 | 0x15 | R | RAM Sink Implementation information |
| trRamStartLow | 0x3014 | 0x0 | R | Lower 32 bits of start address of circular trace buffer |
| trRamLimitLow | 0x3018 | C_DEBUG_TRACE_SIZE/4-1 | R/W | Lower 32 bits of end address of circular trace buffer |
| rtRamWPLow | 0x3020 | 0x0 | R/W |
Lower 32 bits of current write location for trace data in circular buffer |
| trRamRPLow | 0x3028 | 0x0 | R/W | Lower 32 bits of access pointer for trace readback |
| trRamData | 0x3040 | - | R | Read access to SRAM trace memory (32-bit data) |
For registers with optional, implementation defined, features, descriptions are provided. For other registers and additional details, see the RISC-V Trace Control Interface Specification.