The following table summarizes the physical interfaces used by the XRF4 System Controller. These interfaces are described in detail in subsequent sections.
| Interface Name | Interface Type | Description | Function |
|---|---|---|---|
| PS_I2C | I2C | PS_I2C controller is located inside the K26 SOM PS. |
PS_I2C is used for the following controls:
|
| PL_I2C | I2C | PL_I2C interface controller is located inside the SOM FPGA logic. |
PL_I2C is used for the following controls:
|
| PL_SPIM | SPI | SPI controller is located inside the SOM FPGA logic. | PL_SPIM interface is used for controlling SPI peripheral devices located on the RF slice. Currently, the DSA device is controlled using the SPI and slice selection is done through the I2C_SPI_SEL[8:0] pins. |
| I2C_SPI_SEL | Output | I2C_SPI_SEL[8:0] is driven by the SOM PS through an AXI interface. | This interface is used as a MUX select for selecting I2C/SPI interfaces reaching RF slices. The XRF4 supports control of one slice at a time. |
| SLICE_GPIO | GPIO | SLICE_GPIO[5:0] is driven by the SOM PS through an AXI interface. | Each slice receives six GPIO pins from the SOM PS. These GPIOs are internally driven from ADCIO/DACIO pins from the ZCU board. These pins have programmable delay logic included for finer control of signal timing. |
|
ADCIO, DACIO |
RFMC GPIO | ADCIO and DACIO are each 16-bit wide GPIO buses that are sourced from the ZCU670 or ZCU208 board through the RFMC connector. | These GPIOs can be generated from ADCIO/DACIO pins through multiplexing and delay logic and can also be generated from SOM PL logic with timing synced with frame_sync signal from the ZCU board. |
| PL_SPIS | SPI | SPI controller located inside the ZCU RFSoC. | This SPI Interface serves as a peripheral of the SPI controller inside the ZCU, which can access the XRF4 SOM memory space. The SOM uses this memory space for sharing configuration information such as board ID and IP address with the ZCU board. |
| TDD | Output | TDD[1:0] signal is driven by ADCIO and DACIO pins. | Each slice receives two TDD pins that are derived from the ADCIO and DACIO pins and the SOM PL multiplexing logic can assign any of the ADCIO and DACIO to these two TDD pins. |
| PL_AUX | GPIO | GPIO output from the XRF4 SOM FPGA. | PL_AUX is a 10-bit output interface from the SOM FPGA , which can be used for future expansion. |
| Ethernet | TCP/IP | Ethernet connection to host PC. | The XRF4 SOM is connected to the host PC through an Ethernet connection over a router (DHCP) or P2P. The host PC controls the XRF4 over this ethernet connection. |
| Serial console | USB-UART | Host PC serial console for XRF4. | This a UART serial console interface running at 115200 baud and can be used by the host PC to control the XRF4 console application and check the Linux system. |
| MMC1 | SD card | SD card for booting Linux OS on the XRF4 SOM. | The SD card is the primary boot interface for the SOM. The XRF4 kit comes with a compatible SD card for Linux boot. |