The GPIO interface is used to provide timing control signals to RF slices. The ADCIO [15:0] and DACIO [15:0] signals run from the ZCU board to the XRF4-RFBB and are routed into the SOM. From the SOM, these GPIO signals are routed to the RF slices through a MUX logic and a timing control logic. Each slice receives eight GPIOs, which includes two TDD timing signals from the DFE system and six other GPIOs that can be used for frame synchronization or other timing control signals as shown in the following table.
| Interface Name | Bit Width | Connection | Description |
|---|---|---|---|
| ADCIO | 16 | ZCU board to XRF4 RFMC connector | Used for forwarding control signals from the ZCU board to the RF slices. |
| DACIO | 16 | ZCU board to XRF4 RFMC connector | Used for forwarding control signals from the ZCU board to the RF slices. |