PMC MIO[11,49] and LPD MIO[12,13,20,23]: Power Enable

VEK280 Evaluation Board User Guide (UG1612)

Document ID
UG1612
Release Date
2024-01-31
Revision
1.1 English

[Figure 1, callout 22-30]

The VEK280 allows the Versal device to control the power to the various power domains. This is an active-High signal. It is connected to the components that are controlled using an open-drain buffer. Signals are listed in the following table with their associated power domains. The output of the buffers are pulled up with a 4.7K resistor to aid in the default boot state being set properly. When J345 is installed, the associated power enables and, consequently, power supplies are disabled. This can be useful when changing the programmable power supply default programming. When not installed, the Versal device shares control with UTIL_5V0_PGOOD, which is an output from the 5.0V power supply (U191). See schematic page 71 for more information (see Jumpers for defaults).

Table 1. PMC MIO[49] and LPD MIO[12,13,20,23] Power Domains
Versal Device Pin Signal Power Domains
PMC MIO 11 VCC_AUX_1V2_EN VCCAUX_PMC, VCC_PSFP, VCCAUX, UTIL_0V9, VCC1V1_LP4, VCC1V5, LPDMGTYAVCC, VCCO_MIO,
PMC MIO 49 VCC_PSLP_EN LPDMGTYAVCC, LPDMGTYAVTT
LPD MIO 12 VCC_PSFP_EN VCC_PSFP
LPD MIO 13 VCC_SOC_EN VCC_SOC
LPD MIO 20 VCC_PL_EN VCCINT, VCCO_HDIO_3V3, VCC1V5, MGTAVTT, VCC_RAM, MGTAVCC, MGTVCCAUX
LPD MIO 23 VADJ_FMC_EN VADJ_FMC
Note: See LPD MIO[23]: VADJ_FMC Power Rail for more information.