The XCVE2802 device PL I/O bank voltages on the
VEK280 board are listed in the following table.
Important: See LPD MIO[23]: VADJ_FMC Power Rail for more details on the VADJ_FMC power
rail.
Note: See the Versal Premium Series Data Sheet: DC and AC Switching
Characteristics (DS959) for more information. See the
Versal
Adaptive SoC Technical Reference Manual (AM011) for more information about
Versal device configuration
options.
Versal Device (U1) Bank | Power Supply Rail Net Name | Voltage | Description |
---|---|---|---|
XPIO Bank 700 | VCC1V1_LP4 | 1.1V | LPDDR4 TRIP1 CH0 |
XPIO Bank 701 | VCC1V1_LP4 | 1.1V | LPDDR4 TRIP1 CH1 |
XPIO Bank 702 | VCC1V5_LP4 | 1.5V | LPDDR4 TRIP1 CH0/1 reset, HDMI control signals, GPIO LEDs |
XPIO Bank 703 | VCC1V1_LP4 | 1.1V | LPDDR4 TRIP2 CH0 |
XPIO Bank 704 | VCC1V1_LP4 | 1.1V | LPDDR4 TRIP2 CH1 |
XPIO Bank 705 | VADJ_FMC 1 | 1.5V | LPDDR4 TRIP2 CH0/1 reset, HDMI control signals, GPIO DIP,PB0/1, SYSCTLR GPIO[0:7], SYS_CLK_1, FMCP1_LA[00:01]_CC, FMCP1_LA[02:16],FMCP_CLK0 |
XPIO Bank 706 | VADJ_FMC 1 | 1.5V | FMCP1_SYNC_M2C/C2M, LPDDR4 TRIP3 CH0/1 reset, SYS_CLK_2, 1588_GPIO[0:5], FMCP1_REFCLK_C2M, FMCP1_LA[17:18]_CC, FMCP1_LA[19:33], FMCP1_CLK1_M2C |
XPIO Bank 707 | VCC1V1_LP4 | 1.1V | LPDDR4 TRIP3 CH1 |
XPIO Bank 708 | VCC1V1_LP4 | 1.1V | LPDDR4 TRIP3 CH0 |
XPIO Bank 400 | VCCO_HDIO_3V3 | 3.3V (default) | PL_GEM0 MDIO/MDC, PMOD_IO[0:7], PL_GEM0_RX/TX |
XPIO Bank 401 | VCCO_HDIO_3V3 | 3.3V (default) | PL_GEM1_MDIO/MDC, PL_GEM[0:1]_RST, SFP_TX_FAULT, SFP_RX_LOS, UART1_TXD/RXD, SYSCTLR_UART0, PL_GEM1_RX/TX |
PMC MIO 500 | VCCO_MIO | 1.8V | SYSMON, USB ULPI 2.0 interface, OSPI interface |
PMC MIO 501 | VCCO_MIO | 1.8V | SD bus power, PCIe controls, I2C0/21, UART0, CAN0_nSTB, System Controller I2C/[trigger OR CANFD0_INH], SD card controls, GEM reset |
LPD MIO 502 | VCCO_502 | 1.8V | GEM interface/controls, power enables, PCIe PERST, fan tach, fan PWM |
|
See LPD MIO[23]: VADJ_FMC Power Rail for more details.