GTYP Transceivers

VEK280 Evaluation Board User Guide (UG1612)

Document ID
Release Date
1.1 English

[Figure 1, callout 1]

The Versal device (U1) bank 205 and bank 206 GTYP transceivers are wired to the FMCP connector (J51). See schematic pages 9 and 30 for details.

The GTY/GTYP transceivers in the Versal architecture are power-efficient transceivers, supporting line rates from 1.25 Gbps to 32.75 Gbps. The GTY/GTYP transceivers are highly configurable and tightly integrated with the programmable logic resources of the Versal architecture. For more information, see the Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002).