Logical I/O Ports - 2024.2 English - UG1603

AI Engine-ML Kernel and Graph Programming Guide (UG1603)

Document ID
UG1603
Release Date
2024-11-28
Version
2024.2 English

When designing a subgraph, it may not be feasible to know beforehand how an I/O port will be connected in the final system. It is probable that a subgraph output will be linked to an output_plio or output_gmio port. To overcome this issue, the subgraph designer can define logical I/O ports like port<input>, port<inout>, and port<output> graph objects. This ensures that you can specify the inputs and outputs of the subgraph while enabling the end-user to determine how those ports will be physically connected in the system. These objects can establish links between kernels within a graph and across levels of hierarchy in your specifications that include platforms, graphs, and subgraphs.