Explicit Packet Switching - Explicit Packet Switching - 2026.1 English - UG1603

AI Engine-ML Kernel and Graph Programming Guide (UG1603)

Document ID
UG1603
Release Date
2026-07-08
Version
2026.1 English

Multiple AI Engine kernels can share a single processor and execute in an interleaved manner. Similarly, multiple stream connections can share a single physical channel. This mechanism is known as Packet Switching. The AI Engine-ML architecture and compiler work together providing a programming model where up to 32 stream connections can share the same physical channel.

Explicit Packet Switching allows fine-grain control over how packets are generated, distributed, and consumed in a graph computation. Explicit Packet Switching is typically recommended in cases where many low bandwidth streams from common PL source can be distributed to different AI Engine-ML destinations. Similarly, many low bandwidth streams from different AI Engine-ML sources to a common PL destination can also take advantage of this feature. It uses a minimal number of AI Engine-ML to PL interface streams because multiple streams share a single physical channel.

You can create a packet stream for any of the following configurations:

  • One AI Engine kernel to multiple destination kernels.
  • Multiple AI Engine kernels to a single destination kernel.
  • Between multiple AI Engine kernels and multiple destination kernels.

This section describes graph constructs to create packet-switched streams explicitly in the graph, and provide multiple examples on packet switching use cases.