Data Communication via Memory Tile - Data Communication via Memory Tile - 2026.1 English - UG1603

AI Engine-ML Kernel and Graph Programming Guide (UG1603)

Document ID
UG1603
Release Date
2026-07-08
Version
2026.1 English

The memory tile of the AI Engine-ML can provide communication between AI Engine-ML tiles. This communication is based on the multi-port DMAs located in these memory tiles. Memory tiles are large memories that can be used to store intermediate results that do not fit in an AI Engine-ML data memory.

A common use case is to have all the data necessary for a complete iteration available in the memory tile. The kernel using these data runs multiple times in a single iteration. Its input local data memory fills multiple times (ping-pong mechanism), and its output buffer flushes multiple times on another memory tile.

Two different but equivalent ways for read/write access on the memory tile side are available:

  • Read/Write the dataset in multiple tiles, each tile adapts to the memory module size.
  • Read/Write the entire data set, the associated memory module DMA automatically switches between ping and pong buffers.
Figure 1. Communication Using Memory Tile