Configuring Power States for SDCI - Configuring Power States for SDCI - UG1586

For best performance when using SDCI, AMD recommends that you disable the C1 power state on all cores on the CCD where your application is running. This ensures that whatever core your data is steered to on the CCD, it is running in a higher performance mode.

The procedure to do so can very between servers. For accurate information, consult the documentation for your server and its drivers. The following is typical:

1. Disable all power states in the BIOS.
2. To ensure C states are not re-enabled, overriding the BIOS settings, set the following kernel option:
   • For Intel: intel_idle.max_cstate=0
   • For AMD: amd_idle.max_cstate=0
3. To ensure the C1 power state is disabled, set the following kernel option:

   idle=poll

   Note: The C1 power state differs from the C1E power state commonly available in BIOS settings.