[Figure 1, callout 34]
The VPK180 evaluation board has two I2C programmable RC21008A high-performance frequency synthesizers (U298, U299) that provide excellent phase jitter on reference clocks. The output has been configured as a 1.8V LVDS output. The 156.25 MHz RC21008A_GTCLK[1:2]_OUT[0:7] clock signals are connected to the XCVP1802 device U1 transceiver banks. See the table in the Transceivers section for connectivity. See schematic pages 61/62 for further details.
At power-up, this clock defaults to an output frequency of 156.25 MHz. User applications or the system controller can change the output frequency within the range of 0.001 MHz to 650 MHz through the I2C bus interface. Power cycling the VPK180 evaluation board reverts this user clock to the default frequency of 156.25 MHz.
- Programmable frequency synthesizer: Renesas RC21008A065#BB0
- 0.001 MHz-650 MHz range, 156.25 MHz default
- I2C address
0x09 - LVDS differential output