The following sections provide the MIO peripheral mapping implemented on the VPK180 evaluation board. See the Versal Adaptive SoC Technical Reference Manual (AM011) for more information on MIO peripheral mapping. Additional signal connectivity can be located in the following schematic sections:
- Bank 500: See schematic page 20
- Bank 501: See schematic page 21
- Bank 502: See schematic page 21
The following table provides MIO peripheral mapping implemented on the VPK180 evaluation board. The Versal device bank 500, 501, and 502 mappings are listed in the following table.
| Bank | MIO # | Device | Signal | I/O | Notes |
|---|---|---|---|---|---|
| 500 | 0 | QSPI | PMC_MIO0_QSPI_CLK | I/O | |
| 1 | PMC_MIO1_QSPI_DQ1 | I/O | |||
| 2 | PMC_MIO2_QSPI_DQ2 | I/O | |||
| 3 | PMC_MIO3_QSPI_DQ3 | I/O | |||
| 4 | PMC_MIO4_QSPI_DQ0 | I/O | |||
| 5 | PMC_MIO5_QSPI_CS_B | I/O | |||
| 6 | (Reserved for QSPI LOOPBACK) | Not routed on the PCB | |||
| 7 | PMC_MIO7_QSPI_CS_B | I/O | |||
| 8 | PMC_MIO8_QSPI_DQ0 | I/O | |||
| 9 | PMC_MIO9_QSPI_DQ1 | I/O | |||
| 10 | PMC_MIO10_QSPI_DQ2 | I/O | |||
| 11 | PMC_MIO11_QSPI_DQ3 | I/O | |||
| 12 | PMC_MIO12_QSPI_CLK | I/O | |||
| 13 | USB | PMC_MIO13_USB_RST_B | O | USB RESET_B | |
| 14 | PMC_MIO14_USB_DAT0 | I/O | USB Data0 | ||
| 15 | PMC_MIO15_USB_DAT1 | I/O | USB Data1 | ||
| 16 | PMC_MIO16_USB_DAT2 | I/O | USB Data2 | ||
| 17 | PMC_MIO17_USB_DAT3 | I/O | USB Data3 | ||
| 18 | PMC_MIO18_USB_CLKOUT | I/O | USB CLKOUT | ||
| 19 | PMC_MIO19_USB_DAT4 | I/O | USB Data4 | ||
| 20 | PMC_MIO20_USB_DAT5 | I/O | USB Data5 | ||
| 21 | PMC_MIO21_USB_DAT6 | I/O | USB Data6 | ||
| 22 | PMC_MIO22_USB_DAT7 | I/O | USB Data7 | ||
| 23 | PMC_MIO23_USB_DIR | I/O | USB DIR | ||
| 24 | PMC_MIO24_USB_STP | O | USB STP | ||
| 25 | PMC_MIO25_USB_NXT | I/O | USB NXT | ||
| 501 | 26 | SD | PMC_MIO26_SD_CLK | O | SD CLK |
| 27 | PMC_MIO27_SD_DIR1 | O | SD CLK | ||
| 28 | PMC_MIO28_SD_DET | I | SD DETECT | ||
| 29 | PMC_MIO29_SD_CMD | I/O | SD CMD | ||
| 30 | PMC_MIO30_SD_DAT0 | I/O | SD DAT0 | ||
| 31 | PMC_MIO31_SD_DAT1 | I/O | SD DAT1 | ||
| 32 | PMC_MIO32_SD_DAT2 | I/O | SD DAT2 | ||
| 33 | PMC_MIO33_SD_DAT3 | I/O | SD DAT3 | ||
| 34 | PMC_MIO34_SD_SEL | I/O | SD SEL | ||
| 35 | PMC_MIO35_SD_DIR_CMD | O | SD DIR_CMD | ||
| 36 | PMC_MIO36_SD_DIR0 | O | SD DIR0 | ||
| 37 | SYSCTLR | PMC_MIO37_501_ZU4_TRIGGER | I/O | PMC_MIO37_501_ZU4_TRIGGER | |
| 38 | |||||
| 39 | SYSMON I2C | PMC_MIO39_SYSMON_I2C_SCL | I/O | SYSMON I2C SCL | |
| 40 | PMC_MIO40_SYSMON_I2C_SDA | I/O | SYSMON I2C SDA | ||
| 41 | PMC_MIO41_SYSMON_I2C_ALERT | I/O | SYSMON_I2C_ALERT | ||
| 42 | UART | PMC_MIO42_501_RX_IN | I | UART RX | |
| 43 | PMC_MIO43_501_TX_OUT | O | UART TX | ||
| 44 | I2C1 | PMC_MIO44_501_LP_I2C1_SCL | I/O | I2C1 SCL | |
| 45 | PMC_MIO45_501_LP_I2C1_SDA | I/O | I2C1 SDA | ||
| 46 | I2C0 | PMC_MIO46_501_I2C0_SCL | I/O | I2C0 SCL | |
| 47 | PMC_MIO47_501_I2C0_SDA | I/O | I2C0 SDA | ||
| 48 | PMC_MIO48_501 | O | GEM0 RESET | ||
| 49 | Regulator Enable GPIO | VCC_PSLP_EN_LS | O | PSLP power enable | |
| 50 | |||||
| 51 | SD | PMC_MIO51_SD_BUSPWR | O | SD BUSPWR | |
| 502 | 0 | GEM0 | LPD_MIO0_GEM_TX_CLK | O | GEM_TX_CLK |
| 1 | LPD_MIO1_GEM_TX_D0 | I/O | GEM_TX_D0 | ||
| 2 | LPD_MIO2_GEM_TX_D1 | I/O | GEM_TX_D1 | ||
| 3 | LPD_MIO3_GEM_TX_D2 | I/O | GEM_TX_D2 | ||
| 4 | LPD_MIO4_GEM_TX_D3 | I/O | GEM_TX_D3 | ||
| 5 | LPD_MIO5_GEM_TX_CTL | I/O | GEM_TX_CTL | ||
| 6 | LPD_MIO6_GEM_RX_CLK | I | GEM_RX_CLK | ||
| 7 | LPD_MIO7_GEM_RX_D0 | I/O | GEM_RX_D0 | ||
| 8 | LPD_MIO8_GEM_RX_D1 | I/O | GEM_RX_D1 | ||
| 9 | LPD_MIO9_GEM_RX_D2 | I/O | GEM_RX_D2 | ||
| 10 | LPD_MIO10_GEM_RX_D3 | I/O | GEM_RX_D3 | ||
| 11 | LPD_MIO11_GEM_RX_CTL | I/O | GEM_RX_CTL | ||
| 12 | |||||
| 13 | Regulator Enable GPIO | VCC_SOC_EN_LS | O | VCC_SOC power enable | |
| 14 | |||||
| 15 | Regulator Enable GPIO | VCC_PSFP_EN_LS | O | VCC_PSFP power enable | |
| 16 | Regulator Enable GPIO | VCC1V1_LP4_AUX_EN_LS | O | VCC1V1, Aux power enable | |
| 17 | |||||
| 18 | |||||
| 19 | |||||
| 20 | Regulator Enable GPIO | VCC_PL_EN_LS | O | VCC PL power enable | |
| 21 | FAN | MIO21_FAN_PWM_VERSAL | O | Versal device fan PWM | |
| 22 | MIO22_FAN_TACH_VERSAL | I | Versal device fan tach | ||
| 23 | Regulator Enable GPIO | VADJ_FMC_EN_LS | O | VADJ_FMC enable | |
| 24 | MDIO | LPD_MIO24_GEM_MDC | O | GEM MD clock | |
| 25 | LPD_MIO24_GEM_MDIO | I/O | GEM MD I/O |