PMC MIO[44:45] I2C1 Bus

[Figure 1, callout 12]

Bus I2C1 connects the XCVP1802 U1 PS bank 501 and the XCZU4EG system controller U125 PS bank 501 to two I2C switches (TCA9548A U35 and U322). These I2C1 connections enable I2C communications with other I2C capable target devices. TCA9548A U35 is pin-strapped to respond to I2C address 0x74. TCA9548A U322 is pin-strapped to respond to I2C address 0x75. The following figure shows the I2C1 bus connectivity detailed in the table below.

Details for controlling the U35 and U322 TCA9548A switches are available in the data sheet on the Texas Instruments website.

The detailed device connections for the feature described in this section are documented in the VPK180 evaluation board XDC file, referenced in Xilinx Design Constraints.

U34 is an I2C addressable 128-Kbit serial I2C bus EEPROM. It has two addresses associated with it and is connected at the same I2C level as the I2C multiplexer listed in the following table. Address 0x54 is used when the memory array is accessed. When using 0x5C, the identification page is accessed.

The U35 and U322 addresses 0x74 and 0x75 connections are listed in the following tables.