[Figure 1, callout 1]
The Versal device (U1) bank 200 and bank 201 GTYP transceivers are wired to the FMCP connector (J51). See schematic pages 9 and 46 for details.
The GTY/GTYP transceivers in the Versal architecture are power-efficient transceivers, supporting line rates from 1.25 Gbps to 32.75 Gbps. The GTY/GTYP transceivers are highly configurable and tightly integrated with the programmable logic resources of the Versal architecture. For more information, see the Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002).