Board Features

The VPK180 evaluation board features are listed here. Detailed information for each feature is provided in Board Component Descriptions.

• XCVP1802, LSVC4072 package
• Form factor: see Board Specifications
• Onboard configuration from:
  • USB-to-JTAG bridge
  • JTAG pod 2 mm 2x7 flat cable connector
  • microSD card (PS MIO I/F)
  • Quad SPI (QSPI)/eMMC (system controller I/F)
  • Dual QSPI
• Clocks
  • Versal device bank 702/5/8 Si570 LPDDR4_CLK1/2/3 (DIMM) 200 MHz
  • Versal device bank 503 Si570 REF_CLK 33.3333 MHz
  • Versal device bank 503 RTC Xtal 32.768 kHz
  • IEEE-1588 eCPRI 8A34001 clocks (various)
  • Versal device bank GTY102/4 (REFCLK0) HSDP dedicated clocks
  • Versal device bank GTY200/1 (REFCLK0) FMC provided
  • Versal device banks GTM109, GTM110, GTM111, GTM112, GTM115, GTM116, GTM117, GTM118 RC21008A 156.25 MHz
  • Versal device banks GTM208, GTM209, GTM210, GTM211, GTM214, GTM215, GTM216, GTM217 RC21008A 156.25 MHz
• Three LPDDR4 interfaces (2x32-bit 4 GB components each)
  • XPIO triplet 1 (banks 700, 701, 702)
  • XPIO triplet 2 (banks 703, 704, 705)
  • XPIO triplet 3 (banks 706, 707, 708)
• PL FMCP HSPC (FMC+) connectivity
  • FMCP1 HSPC full LA[00:33] bus
• PL GPIO connections
  • PL UART1 to FTDI
  • PL GPIO DIP switch (4-position)
  • PL GPIO LEDs (four)
  • PL GPIO pushbuttons (two)
  • PL trace connector (J332)
  • PL SYSCTLR_GPIO[0:15]
  • PL 8A34001_GPIO[0:7, 10:15]
• 28 PL GTYP transceivers (7 quads)
  • Not used (18, bank GTYP102, GTYP103, GTYP104, GTYP105, GTYP106)
  • System controller HSDP (1, banks GTYP104)
  • USB-C HSDP (1, banks GTYP102)
  • FMCP1 HSPC DP (8, banks GTYP200, GTYP201)
• 140 PL GTM transceivers (35 quads)
  • Not used (74, bank GTM109, GTM110, GTM115, GTM116, GTM121, GTM122, GTM123, GTM124, GTM202, GTM203, GTM204, GTM205, GTM206, GTM207, GTM212, GTM213, GTM214, GTM215, GTM216, GTM217, GTM218, GTM219, GTM220, GTM221, GTM222, GTM223, GTM224)
  • QSFPDD1 (8, banks GTM208, GTM209, GTM210, GTM211)
  • QSFPDD2 (8, banks GTM208, GTM209, GTM210, GTM211)
    Note: QSFPDD1 and QSFPDD2 are interleaved.
  • QSFPDD3 (8, banks GTM111, GTM112)
  • QSFPDD4 (8, banks GTM117, GTM118)
  • QSFPDD5 (8, banks GTM121, GTM122, GTM123, GTM124)
  • QSFPDD6 (8, banks GTM221, GTM222, GTM223, GTM224)
  • OSFP (8, banks GTM214, GTM215, GTM216, GTM217)
  • SFPDD1 (2, bank GTM109)
  • SFPDD2 (2, bank GTM110)
  • SFPDD3 (2, bank GTM115)
  • SFPDD4 (2, bank GTM116)
  • User SMA connectors (1, bank GTM219)
  • 8A34001 CLK (1, bank GTM219)
• PS PMC MIO connectivity
  • PS MIO[0:12]: boot configuration QSPI
    • DC QSPI support
  • PS MIO[13:25]: USB2.0
  • PS MIO[26:36, 51]: SD1 I/F
  • PS MIO[37]: ZU4_TRIGGER
  • PS MIO[38]: Not connected
  • PS MIO[39:41]: SYSMON_I2C
  • PS MIO[42:43]: UART0 to FTDI
  • PS MIO[44:47]: I2C1, I2C0
  • PS MIO[48], PS LPD MIO[0:11, 24:25]: GEM0 RGMII Ethernet RJ-45
  • PS MIO[49] and LPD MIO[13,15:16,20]: power enable
  • PS MIO[50] and LPD MIO[18:19]: Not connected
  • PS LPD MIO [21:22]: optional fan interface
  • LPD MIO[23]: VADJ_FMC power rail
• Security: PSBATT button battery backup
• SYSMON header
• Operational switches (power on/off, PROG_B, boot mode DIP switch)
• Operational status LEDs (INIT, DONE, PS STATUS, PGOOD)
  • See Power and Status LEDs
• Power management
• System controller (XCZU4EG)

The VPK180 evaluation board provides a rapid prototyping platform using the XCVP1802-2MSELSVC4072 device. See the Versal Architecture and Product Data Sheet: Overview (DS950) for a feature set overview, description, and ordering information.