The ADK2 debug connector provides support for the following development interfaces:
- AMD device JTAG access
- Multiple UARTs
- Satellite controller JTAG
- PMBus, directly connected to the Renesas dongle header.
- SMBus, directly connected to the Aardvark header for bus monitoring.
- Analog test points for voltage measurement.
- GPIO connections for card monitoring and control.
Note: Not all cards implement all interfaces. See card
specific documentation for more details.
The pinout of the flex header is detailed in the following table. The analog test points and GPIOs are defined in card specific documentation.
| Pin | Signal Name | Pin | Signal Name |
|---|---|---|---|
| A1 | SOC_JTAG_VREFIN | B1 | FPGA_JTAG_VREFIN |
| A2 | SOC_JTAG_TDI | B2 | FPGA_JTAG_TCK |
| A3 | SOC_JTAG_TMS | B3 | FPGA_JTAG_TMS |
| A4 | SOC_JTAG_TCK | B4 | FPGA_JTAG_TDI |
| A5 | SOC_JTAG_TRST_B | B5 | FPGA_JTAG_TDO |
| A6 | SOC_JTAG_TDO | B6 | FPGA_SRST_B |
| A7 | SOC_RST_B | B7 | SOC_TBSCAN_EN |
| A8 | GND | B8 | GND |
| A9 | SOC_UART_VREF | B9 | FPGA_UART_VREF |
| A10 | SOC_UART_RXD | B10 | FPGA_UART_RXD |
| A11 | SOC_UART_TXD | B11 | FPGA_UART_TXD |
| A12 | GND | B12 | DEBUG_MODULE_IO_EXP_P13 |
| A13 | DUT_PG | B13 | SUC_UART_RXD |
| A14 | SUC_JTAG_TCK | B14 | SUC_UART_TXD |
| A15 | SUC_JTAG_TRST_B | B15 | SUC_SWDIO |
| A16 | SUC_JTAG_TDI | B16 | SUC_SWCLK |
| A17 | SUC_JTAG_TMS | B17 | SUC_SWO |
| A18 | SUC_JTAG_TDO | B18 | SUC_RST_B |
| A19 | DEBUG_MODULE_IO_EXP_P14 | B19 | DEBUG_MODULE_IO_EXP_P15 |
| A20 | ADC1_IN2 | B20 | SUC_VREFIN |
| A21 | PMBUS_SDA | B21 | SMBUS_SDA |
| A22 | PMBUS_SCL | B22 | SMBUS_SCL |
| A23 | PMBUS_ALERT_B | B23 | SoC_TA_PROG_SFP |
| A24 | GND | B24 | GND |
| A25 | ADC1_IN0 | B25 | ADC1_IN1 |
| A26 | ADC0_IN6 | B26 | ADC0_IN7 |
| A27 | ADC0_IN4 | B27 | ADC0_IN5 |
| A28 | ADC0_IN2 | B28 | ADC0_IN3 |
| A29 | ADC0_IN0 | B29 | ADC0_IN1 |
| A30 | DEBUG_MODULE_PRSNT_B | B30 | GND |