The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 06/25/2025 Version 2025.1 | |
| About This Guide | Added Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 information. |
| Throughout document | Added XMP505 and XMP506 references. |
| System Design Planning Methodology Flow | Added AM026. |
| Memory and Data Movement | Added AM020 and AM027. |
| AI Engine Throughput and Latency | Added AM027, PG406, and PG456. |
| Safety and Security Requirements | Added AM026. |
| Performance Modeling in Vivado IP Integrator | Added PG406 and PG456. |
| Requirements Gathering | Added AM027. |
| Compute Requirements | Added AM020 and AM027. |
| Run Power Estimation | Updated links. |
| System Debug Planning | Added AM026. |
| Selecting the Debug Interfaces | Added AM026. |
| Debug via Aurora (HSDP) | Added AM026. |
| Planning for Software Debug | Updated Software Command-Line Tool reference with UG1725 and updated XSDB description. |
| System Validation Planning | Added PG406 and PG456. |
| Hardware-Only System Validation Planning | Updated Software Command-Line Tool reference with UG1725. |
| Embedded System Validation Planning | Updated Arm description. |
| System Validation Planning | Updated to XSDB. |