The PMC includes a JTAG interface that can be used for both programming and debugging designs running on the Versal adaptive SoC. The JTAG interface consists of two cascaded blocks:
- Debug access port (DAP)
- Test access port (TAP)
The DAP primarily accesses the various debug features of the PS. It also supports low-bandwidth read/write access to any accessible register and memory location within the address range of the PS. The TAP interface primarily provides access to the device configuration and boundary scan infrastructure. It also includes instructions for configuring and accessing the DPC functionality.