In data center applications and other PCIe interface-hosted systems, you can access the DPC via the same PCIe interface in the CPM. This interface is used for host-to-adaptive SoC communication. You can choose how to map the debug function to a PCIe physical function and BAR space. The debug function includes a dedicated PCIe HSDP DMA engine that moves debug data between the DPC and host memory.
Note: CPM availability is device
specific. For information, refer to the
Versal
Architecture and Product Data Sheet: Overview (DS950).