PCIE40E5 - PCIE40E5 - 2026.1 English - Primitive: Integrated block for PCI Express. - UG1485

Versal Architecture Premium Series Libaries Guide (UG1485)

Document ID
UG1485
Release Date
2026-06-23
Version
2026.1 English

Primitive: Integrated block for PCI Express.

  • PRIMITIVE_GROUP: ADVANCED
  • PRIMITIVE_SUBGROUP: PCIE

Introduction

The Integrated block for PCI Express is a hard macro primitive compliant with the PCIe specification. This block is designed to be integrated with GTs and device clocking resources using fabric interconnect.

Design Entry Method

Instantiation No
Inference No
IP and IP Integrator Catalog No

Related Information

  • Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)