Programmable Logic and Processor Subsystem - 2024.1 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2024-05-30
Version
2024.1 English

Versal's programmable logic blocks and memory are architected for flexible custom-compute and data movement. The Arm Cortex®-A72 and Cortex®-R5F processors allow for complex control processing tasks.

Refer to the Versal Adaptive SoC AI Engine Architecture Manual (AM009) and the Versal Adaptive SoC AIE-ML Architecture Manual (AM020) for specific details on the AI Engine array and interfaces of each architecture.

Refer to the Versal Architecture and Product Data Sheet: Overview (DS950) for specific details on Compute and Acceleration Engines.