Performing Burst Mode Hardware Co-Simulation - 2025.2 English - UG1483

To perform the burst mode hardware co-simulation, execute the MATLAB M-code test bench that was generated automatically during compilation. (See Compiling a Model for Hardware Co-Simulation.)

You can find the test bench in the Target directory that you specified when the design was compiled for the hardware co-simulation compilation target.

The test bench uses the following naming convention:

• If you compiled the top-level design the test bench will be named:

  <design_name>_hwcosim_test.m

• If you compiled a subsystem of the design the test bench will be named:

  <design_name>_<sub_system>_hwcosim_test.m

  Note: If your board contains an AMD Zynq™ SoC device, you must install the AMD Vitis™ unified software platform with the AMD Vivado™ Design Suite to perform hardware co-simulation.

To perform burst mode hardware co-simulation, do the following:

1. Set up the board for performing JTAG hardware co-simulation.
   • Connect a cable to the board's JTAG port.

     For a description of the setup procedure for a JTAG hardware co-simulation, using a KC705 board as an example, see Setting Up a KC705 Board for JTAG Hardware Co-Simulation.

2. Run the test bench script from the MATLAB console. To run the script, open the MATLAB console, change directory to the HDL subsystem source directory (<target_directory>/ip/<hdl_subystem>/src) and run the script by name.

   The script runs the Simulink model to determine the stimulus data driven to the AMD Gateway In blocks (from the other Simulink source blocks or MATLAB variables), and captures the expected output produced by the AMD block design (BD), and exports the data to the Target directory as these separate data files:

   <design_name>_<sub_system>_<port_name>.dat

   The test bench then compares actual to expected outputs.

   If the test fails, the console prints an error message, and the failing comparisons are listed in this file:

   <design_name>_<sub_system>_hwcosim_test.result