HDL Hardware co-simulation in Model Composer brings on-chip acceleration and verification capabilities into the Simulink simulation environment. In a typical Model Composer flow, you first compile the model for a hardware co-simulation platform. This process generates a hardware implementation (bitstream) and links it to a hardware co-simulation block. Model Composer inserts the block into a Simulink model and connects its ports with appropriate source and sink blocks. The whole model simulates while the compiled Model Composer design executes on an FPGA.
Alternatively, it is possible to programmatically control the hardware created through the Model Composer HDL hardware co-simulation flow using MATLAB M-code (M-Hwcosim). The M-Hwcosim interfaces allow for MATLAB objects that correspond to the hardware to be created in pure M-code, independent of the Simulink framework. You can then use these objects to read and write data into hardware.
This capability is useful for providing a scripting interface to hardware co-simulation. It allows you to use the hardware in a scripted test bench or deployed as hardware acceleration in M-code. In addition to supporting Model Composer simulation scheduling semantics, M-Hwcosim lets you use any arbitrary schedule. You can exploit this flexibility to improve the performance of a simulation if you already understand how the design works. Additionally, the M-Hwcosim objects provide accessibility to the hardware from the MATLAB console, allowing for the hardware internal state to be introspected interactively.