Introduction - Introduction - 2026.1 English - UG1483

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2026-06-23
Version
2026.1 English
Important: The HLS blockset described in this chapter will be deprecated in a future release of Vitis Model Composer. These blocks are no longer visible in the Simulink Library Browser. Do not create new designs using these blocks. Existing designs containing these blocks will continue to simulate and generate code for a limited time. For forward compatibility, only use the HLS Kernel block to include HLS functionality in Vitis Model Composer designs.

AMD Vitis™ Model Composer provides the HLS blockset in the AMD Toolbox. This lets you transform your algorithmic specifications to production-quality IP implementations using automatic optimizations and leveraging the high-level synthesis technology of Vitis HLS. Using the IP integrator in Vivado, you can then integrate the IP into a platform that, for example, can include an AMD Zynq™ device, DDR3 DRAM, and a software stack running on an Arm® processor.

The HLS library in the AMD Toolbox provides optimized blocks for use within the Simulink environment. These include basic functional blocks for expressing algorithms like Math, Linear Algebra, Logic, and Bit-wise operations and others.

The HLS library contains the following categories of elements.

Table 1. HLS Block Library
Library Description
Logic and Bit Operations Blocks that perform logical operations and bit-wise operations.
Lookup Tables Block that performs a one dimensional lookup operation with an input index.
Math Functions Blocks that implement mathematical functions.
Ports and Subsystems Blocks that allow creation of subsystems and input/output ports.
Relational Operations Blocks for comparing two signals.
Signal Attributes Blocks that perform data type conversion.
Signal Operations Blocks that delay signals in time.
Signal Routing Blocks that combine, decombine, and route signals.
Sinks Blocks that receive and display signal output from other blocks.
Source Blocks that generate or import signal data.
Tools Blocks that control the implementation and interface of the Model.
User-Defined Functions Block for importing an HLS Kernel as a block.

The HLS block library is compatible with the standard Simulink block library. You can use these blocks together to create models for simulation in Simulink. However, Model Composer only supports certain Simulink blocks for code generation by Model Composer. You can find Simulink blocks compatible with output generation from Model Composer in the HLS block library.

Model Composer also lets you create your own custom blocks from existing C/C++ code for use in models. Refer to Importing C/C++ Code as Custom Blocks for more information.

Your Model Composer design is bit-accurate with regard to the final implementation in hardware, though untimed. You can compile the design model into C++ code for synthesis in Vitis HLS. You can also create HDL blocks, or packaged IP for use in Vivado.

To familiarize yourself with the Model Composer HLS library, the Vitis Model Composer Tutorials include labs and data to walk you through the tool.

The rest of this document discusses the following topics: