This topic explains how to simulate a complete mixed language/mixed flow design that includes AMD HDL blocks, HDL modules, and a Simulink block design.
Model Composer simulates black boxes by:
- Automatically launching an HDL simulator
- Generating additional HDL as needed (analogous to an HDL test bench)
- Compiling HDL
- Scheduling simulation events
- Handling the exchange of data between the Simulink and the HDL simulator
This is known as HDL co-simulation.